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CXD2755Q
Super Audio CD Format Book ANNEX D&E Conformal Metering
Description The CXD2755Q is the signal processor for signal level measurement of DSD (Direct Stream Digital) conformed to ANNEX D&E of Super Audio CD Format Book V1.2. This LSI can measure up to 8 channel DSD signals to detect the maximum level of each frequency band specified in ANNEX D&E of Super Audio CD format and output the peak values of every 44.1kHz cycle for the signal level measurement and display. Functions * Up to 8 channels of 1bit, 2.8224MHz (44.1kHz x 64) DSD input supported. * MaxPeak measurement (ANNEX D3): 28-tap 1st-order moving average filter is used for MaxPeak level measurement. * DC removal filter: DC removal filter (fc = about 0.1Hz) is inserted to HF/MF/LF filters. * HF measurement (ANNEX D4): 40kHz 5th-order Butterworth high-pass filter and 100kHz 5th-order Butterworth low-pass filter are used for HF band measurement. In addition, "Mean-Square" and "Square-Root" are calculated for RMS metering. * MF measurement (ANNEX E2): 20kHz 10th-order Butterworth high-pass filter and 50kHz 5th-order Butterworth low-pass filter are used for MF band measurement. * LF measurement: 20kHz 10th-order Butterworth low-pass filter is used for LF band measurement. * DC measurement (ANNEX E4): 0.1Hz 2nd-order low-pass filter is used for DC measurement. * MF over warning flag (ANNEX E2): As the MF specification has the exceptional condition for warning, the signal level of MF and LF are continuously compared and output the warning status from this LSI. 208 pin QFP (Plastic)
Structure Silicon gate CMOS IC Absolute Maximum Ratings (Ta = 25C) * Supply voltage VDD VSS - 0.5 to + 4.6 V * Input voltage VI VSS - 0.5 to VDD + 0.5 V * Output voltage VO VSS - 0.5 to VDD + 0.5 V * Storage temperature Tstg -55 to +150 C Recommended Operating Conditions * Supply voltage VDD 3.0 to 3.6 * Operating temperature Topr -10 to +75 Input/Output Capacitance * Input capacitance CI * Output capacitance CO
V C
Max. 9pF Max. 11pF
Note) Measurement conditions VDD = VI = 0V, fM = 1MHz
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E02559-PS
Block Diagram
DSDI0 189 MaxPeak L.P.F 8-channel Meter I/F DC L.P.F
80 8MXPKO 79 8DCO 74 8HFRMSO 72 8LFO 70 8MFO 96 2MXPKO 95 2DCO 2-channel Meter I/F 91 2HFRMSO 90 2LFO
DSDI1 190
DSDI2 193
DSDI3 194
DSD I/F
DSDI4 195
DSDI5 196 HF B.P.F. RMS Calculation
DSDI6 198
DSDI7 199
Peak Sampling at 44.1kHz
MCKI
LOCK
XINIT
8BCKI
FSCKI
MCKO
2BCKI
CSEL0
CSEL1
CSEL2
MUTE0
MUTE1
MUTE2
MUTE3
MUTE4
MUTE5
MUTE6
FSCKO
MUTE7
XSDIF3
XSEL8
OFORM
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DC Removal H.P.F MF B.P.F. LF L.P.F. Setup 169 170 173 174 175 176 178 179 17 18 19
86 2MFO
71 8MFFLGO Flag I/F 89 2MFFLGO
Timing
22 23 24 27 28 29 60 61 62 66 82
CXD2755Q
CXD2755Q
Pin Configuration
Test OUT 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
MXOVER MON31 MON30 MON29 MON28 MON27 MON26 MON25 MON24 MON23 MON22 MON21 MON20 MON19 MON18 MON17 MON16 MON15 MON14 MON13 MON12 MON11 MON10 MON9 MON8 MON7 MON6 MON5 MON4 MON3 MON2 MON1 MON0 MFLF NC NC VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS NC
157 VSS 158 NC 159 NC 160 NC 161 VDD 162 VSS 163 NC 164 NC 165 NC 166 NC 167 VSS 168 NC 169 MUTE0 170 MUTE1 171 VDD
Mute Setting
NC 104 NC 103 NC 102 NC 101 NC 100 NC 99 VSS 98 VDD 97
2MXPKO 96 2DCO 95 2HFRO 94 VSS 93 2HFMSO 92 2HFRMSO 91 2LFO 90 2MFFLGO 89 VSS 88 VDD 87 2MFO 86 NC 85 NC 84 VSS 83 2BCKI 82 NC 81 8MXPKO 80 8DCO 79 VSS 78 VDD 77 8HFRO 76 8HFMSO 75 8HFRMSO 74 VSS 73 8LFO 72 8MFFLGO 71 8MFO 70 NC 69 VSS 68 VDD 67 8BCKI 66 NC 65 NC 64 VSS 63 CSEL2 62 CSEL1 61 CSEL0 60 NC 59 VSS 58 VDD 57 NC 56 NC 55
HFMSRES MONSEL0 MONSEL1 MONSEL2 MONSEL3 CUTSEL0 CUTSEL1 CUTSEL2 8ch Metering Data OUT & Clock 2ch Metering Data OUT & Clock
172 VSS 173 MUTE2 174 MUTE3 175 MUTE4 176 MUTE5 177 VSS 178 MUTE6 179 MUTE7 180 NC 181 VDD 182 VSS 183 NC 184 NC 185 NC 186 NC 187 VSS 188 NC 189 DSDI0 190 DSDI1 191 VDD 192 VSS 193 DSDI2 194 DSDI3 195 DSDI4 196 DSDI5 197 VSS 198 DSDI6 199 DSDI7 200 NC 201 VDD 202 VSS 203 NC 204 NC 205 NC 206 NC 207 NC 208 NC
VDD VSS VSS VSS NC NC NC NC NC NC NC OFORM MONEN XSDIF3 FSCKO TENA1
DSD Data IN
NC 54
TRST
XSEL8
MCKO
FSCKI
LOCK
XINIT
MCKI
VSS 53
TDO VST
TCK
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 Test Mode Setting Clock & Reset Test
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TDI
NC
NC
NC
NC
NC
NC
VSS
CXD2755Q
Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Symbol VSS NC NC NC VDD VSS NC NC NC NC VSS CUTSEL0 CUTSEL1 CUTSEL2 VDD VSS XSDIF3 XSEL8 OFORM HFMSRES VSS FSCKI FSCKO LOCK VDD VSS MCKI MCKO XINIT NC VSS NC NC MONEN VDD Ipd NC. I O Ipu Master clock input. MCKI = 22.5792MHz (512Fs) Buffered master clock output. System initialization at Low level. (I/O clock is active while initializing.) ISC O O Base-band sampling frequency (Fs) input. Fs = 44.1kHz Generated base-band sampling frequency (Fs) output. Fs = 44.1kHz Status flag of synchronization between FSCKI and FSCKO. (High: Locked/Low: Un-locked) Ipu Ipd Ipu Ipu DSD input format setting. (High: DSD-raw/Low: SDIF-3) Output channels setting. (High: 2-channel/Low: 8-channel) Output format setting. (High: MSB first, left justified/Low: LSB first, right justified) NC. Ipd Ipd Ipd NC. NC. NC. I/O Description
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input -4-
CXD2755Q
Pin No. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69
Symbol VSS MONSEL0 MONSEL1 MONSEL2 MONSEL3 VSS NC NC NC VDD VSS TCK TDI TENA1 TRST TDO VST VSS NC NC NC VDD VSS NC CSEL0 CSEL1 CSEL2 VSS NC NC 8BCKI VDD VSS NC
I/O
Description
Ipd Ipd Ipd Ipd
NC. NC. NC. NC.
Ipu Ipu Ipu Ipu O
NC. NC. NC. Fixed to Low level or input Power on reset signal. NC. GND. (VSS for test circuit)
I I I
Channel select input 0 for 8-channel output stream. (Normally, 4Fs clock should be input.) Channel select input 1 for 8-channel output stream. (Normally, 2Fs clock should be input.) Channel select input 2 for 8-channel output stream. (Normally, 1Fs clock should be input.)
Isc
Bit clock input for 8-channel output stream. (Normally, 256Fs clock should be input.)
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input -5-
CXD2755Q
Pin No. 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
Symbol 8MFO 8MFFLGO 8LFO VSS 8HFRMSO 8HFMSO 8HFRO VDD VSS 8DCO 8MXPKO NC 2BCKI VSS NC NC 2MFO VDD VSS 2MFFLGO 2LFO 2HFRMSO 2HFMSO VSS 2HFRO 2DCO 2MXPKO VDD VSS NC NC NC NC NC NC VSS
I/O O O O O O O
Description 8-channel MF band (20kHz to 50kHz) data output. 8-channel MF band (20kHz to 50kHz) level warning status output. 8-channel LF band (up to 20kHz) data output. 8-channel HF band (40kHz to 100kHz) RMS calculated data output. NC. NC.
O O
8-channel DC (up to 0.1Hz) data output. 8-channel MaxPeak (up to 50kHz) data output. Bit clock input for 2-channel output stream. (Normally 64Fs clock should be input.)
Isc
O
2-channel MF band (20kHz to 50kHz) data output.
O O O O O O O
2-channel MF band (20kHz to 50kHz) level warning status output. 2-channel LF band (up to 20kHz) data output. 2-channel HF band (40kHz to 100kHz) RMS calculated data output. NC. NC. 2-channel DC (up to 0.1Hz) data output. 2-channel MaxPeak (up to 50kHz) data output.
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input -6-
CXD2755Q
Pin No. 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141
Symbol NC MFLF MXOVER VDD VSS MON0 MON1 MON2 MON3 VSS MON4 MON5 MON6 VDD VSS MON7 MON8 MON9 MON10 VSS MON11 MON12 MON13 VDD VSS MON14 MON15 MON16 MON17 VSS MON18 MON19 MON20 VDD VSS MON21
I/O
Description
O O
NC. NC.
O O O O O O O
NC. NC. NC. NC. NC. NC. NC.
O O O O O O O
NC. NC. NC. NC. NC. NC. NC.
O O O O O O O
NC. NC. NC. NC. NC. NC. NC.
O
NC.
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input -7-
CXD2755Q
Pin No. 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177
Symbol MON22 MON23 MON24 VSS MON25 MON26 MON27 VDD VSS MON28 MON29 MON30 MON31 NC NC VSS NC NC NC VDD VSS NC NC NC NC VSS NC MUTE0 MUTE1 VDD VSS MUTE2 MUTE3 MUTE4 MUTE5 VSS
I/O O O O O O O NC. NC. NC. NC. NC. NC.
Description
O O O O
NC. NC. NC. NC.
Ipd Ipd
DSD channel 0 input mute. (High: mute/Low: normal input) DSD channel 1 input mute. (High: mute/Low: normal input)
Ipd Ipd Ipd Ipd
DSD channel 2 input mute. (High: mute/Low: normal input) DSD channel 3 input mute. (High: mute/Low: normal input) DSD channel 4 input mute. (High: mute/Low: normal input) DSD channel 5 input mute. (High: mute/Low: normal input)
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input -8-
CXD2755Q
Pin No. 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208
Symbol MUTE6 MUTE7 NC VDD VSS NC NC NC NC VSS NC DSDI0 DSDI1 VDD VSS DSDI2 DSDI3 DSDI4 DSDI5 VSS DSDI6 DSDI7 NC VDD VSS NC NC NC NC NC NC
I/O Ipd Ipd
Description DSD channel 6 input mute. (High: mute/Low: normal input) DSD channel 7 input mute. (High: mute/Low: normal input)
Isc Isc
DSD channel 0 input. DSD channel 1 input.
Isc Isc Isc Isc Isc Isc
DSD channel 2 input. DSD channel 3 input. DSD channel 4 input. DSD channel 5 input. DSD channel 6 input. DSD channel 7 input.
Isc: Hysteresis (Schmitt) input / Ipu: Pulled-up input / Ipd: Pulled-down input
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CXD2755Q
Electrical Characteristics DC Characteristics Item Input voltage High level Low level High level Input voltage Low level High level Low level Symbol VIH VIL VT+ VT- 0.5 IOH = -4.0mA IOL = 4.0mA VIH = VDD VIL = 0V V = VDD or 0V 40 -240 -10 100 -100 VDD - 0.4 0.4 240 -40 10 VOH VOL IIH IIL II 0.7VDD 0.2VDD Conditions Min. 0.7VDD 0.2VDD (VDD = 3.0 to 3.6V, Topr = -20 to +75C) Typ. Max. Unit V V V V V V V A A A Applicable pins 1, 3, 4 1, 3, 4 5 5 5 2 2 4 3 1, 5
Hysteresis VT+ - VT- Output voltage Input leak (1) Input leak (2) Input leak (3)
1 MCKI, CSEL0, CSEL1, CSEL2 2 FSCKO, LOCK, MCKO, 8MFO, 8MFFLGO, 8LFO, 8HFRMSO, 8HFMSO, 8HFRO, 8DCO, 8MXPKO, 2MFO, 2MFFLGO, 2LFO, 2HFRMSO, 2HFMSO, 2HFRO, 2DCO, 2MXPKO, MFLF, MXOVER, MON0 to MON31 3 XSDIF3, OFORM, HFMSRES, XINIT, TCK, TDI, TENA1, TRST 4 CUTSEL0, CUTSEL1, CUTSEL2, XSEL8, MONEN, MONSEL0 to MONSEL3, MUTE0 to MUTE7 5 FSCKI, 2BCKI, 8BCKI, DSDI0 to DSDI7
AC Characteristics 1. Master Clock (MCKI, MCKO pins) Item MCKI frequency MCKI pulse width Propagation delay from MCKI rise to MCKO rise Propagation delay from MCKI fall to MCKO fall Symbol fmck twmck tphmck tplmck (VDD = 3.0 to 3.6V, Topr = -20 to +75C) Min. -- 15.28 5.12 5.41 Typ. 22.5792 22.14 10.73 11.34 Max. -- -- 22.24 23.52 Unit MHz ns ns ns
1/fmck twmck MCKI twmck
MCKO tphmck tplmck
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CXD2755Q
2. Output for 2-Channel Meter (FSCKI, FSCKO, 2BCKI, 2O) Item FSCKI frequency FSCKO rise time from FSCKI rise 2BCKI frequency 2BCKI clock pulse width (High) 2BCKI clock pulse width (Low) FSCKO setup time, relative to 2BCKI rise FSCKO hold time, relative to 2BCKI rise 2BCKI fall setup time, relative to MCKI rise 2BCKI rise setup time, relative to MCKI rise 2O change time from 2BCKI fall 1 Minimum gate delay -1MCK 2 Typical gate delay 3 Maximum gate delay +1MCK Symbol ffscki tfsckodly f2bcki tw2bckih tw2bckil tsufscko thdfscko tsu2bckil tsu2bckih t2odly
(VDD = 3.0 to 3.6V, Topr = -20 to +75C) Min. -- -39.21 -- 143 143 143 143 2.3 2.2 12.1 Typ. 44.1 10.72 2.8224 177 177 177 177 5.0 4.7 25.6 Max. -- 66.53 -- 211 211 211 211 10.3 9.8 52.9 Unit kHz ns MHz ns ns ns ns ns ns ns
1/ffscki FSCKI
FSCKO tfsckodly
MCKI
FSCKO 1/f2bcki tw2bckih 2BCKI t2odly 2O tw2bckil thdfscko tsu2bckil tsufscko tsu2bckih
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CXD2755Q
3. Output for 8-Channel Meter (CSEL, 8BCKI, 8O) Item CSEL0 frequency CSEL1 frequency CSEL2 frequency 8BCKI frequency 8BCKI clock pulse width (High) 8BCKI clock pulse width (Low) 8BCKI fall setup time, relative to MCKI rise 8BCKI rise setup time, relative to MCKI rise CSEL setup time, relative to 8BCKI rise CSEL hold time, relative to 8BCKI rise 8O change time from 8BCKI fall Symbol fcsel0 fcsel1 fcsel2 f8bcki tw8bckih tw8bckil tsu8bckil tsu8bckih tsufscko thdfscko t8odly
(VDD = 3.0 to 3.6V, Topr = -20 to +75C) Min. -- -- -- -- -- -- 3.6 3.1 -44.3 -44.3 13.4 28.2 Typ. 176.4 88.2 44.1 11.2896 44.3 44.3 7.6 6.6 Max. -- -- -- -- -- -- 15.8 13.8 44.3 44.3 58.4 Unit kHz kHz kHz MHz ns ns ns ns ns ns ns
1/fcsel2 CSEL2 1/fcsel1 CSEL1 1/fcsel0 CSEL0
MCKI CSEL 1/f8bcki tw8bckih 8BCKI t8odly 8O tw8bckil thdcsel tsu8bckil tsucsel tsu8bckih
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CXD2755Q
Description of Functions Description of Operation Modes This LSI has two operating modes. * 2-channel mode: Detect the maximum level of each frequency Audio CD format and output the peak values level measurement and display. * 8-channel mode: Detect the maximum level of each frequency Audio CD format and output the peak values measurement and display up to 8 channels. 1) Description of 2-Channel Mode band specified in ANNEX D&E of Super of every 44.1kHz cycle for stereo signal band specified in ANNEX D&E of Super of every 44.1kHz cycle for signal level
MaxPeak data x 2 DSD data HF RMS data x 2 MF data x 2 CXD2755Q LF data x 2 DC data x 2 MF status flag x 2
DSD data
Mute ON/OFF
2) Description of 8-Channel Mode
DSD data DSD data DSD data DSD data CXD2755Q DSD data DSD data DSD data DSD data
MaxPeak data x 8 HF RMS data x 8 MF data x 8 LF data x 8 DC data x 8 MF status flag x 8
Mute ON/OFF
Channel Select
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CXD2755Q
Setup This LSI can setup the various functions by parallel setting which sets the functions according to the pin High and Low levels. Setup Pins and Their Contents Pin No. 17 18 19 169 170 173 174 175 176 178 179 Symbol XSDIF3 XSEL8 OFORM MUTE0 MUTE1 MUTE2 MUTE3 MUTE4 MUTE5 MUTE6 MUTE7 Contents DSD input format setting Output channel setting Output format setting DSD channel 0 input mute DSD channel 1 input mute DSD channel 2 input mute DSD channel 3 input mute DSD channel 4 input mute DSD channel 5 input mute DSD channel 6 input mute DSD channel 7 input mute High DSD-raw 2-channel MSB first, left justified Mute Mute Mute Mute Mute Mute Mute Mute Low SDIF-3 8-channel LSB first, right justified Normal input Normal input Normal input Normal input Normal input Normal input Normal input Normal input Effective modes 2-channel O O O O O 8-channel O O O O O O O O O O O
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CXD2755Q
1. 2-Channel Mode 1-1. Input/Output Signals DSDI0, DSDI1: Input the 2-channel DSD data 2MXPKO: Output the 2-channel MaxPeak (ANNEX D3) data 2HFRMSO: Output the 2-channel HF RMS (ANNEX D4) calculated data 2MFO: Output the 2-channel MF (ANNEX E2) data 2MFFLGO: Output the 2-channel status flags for MF (ANNEX E2) warning 2LFO: Output the 2-channel LF data 2DCO: Output the 2-channel DC (ANNEX E4) data 1-2. DSD Data Input The 1-bit DSD data with 2.8224MHz (44.1kHz x 64) sampling frequency is input to the DSDI0 and DSDI1 pins. As the input circuit detects the data edge for data acquisition internally, any bit clock is not necessary. Assure the input signal format (DSD-raw or SDIF-3) and select the proper mode by the XSDIF3 pin. XSDIF3 = High: DSD-raw format XSDIF3 = Low: SDIF-3 format
1/64Fs DSDI D0 D1 D2 D3
DSD Data Input (DSD-raw)
1/64Fs DSDI D0 D0 D1 D1 D2 D2 D3 D3
DSD Data Input (SDIF-3)
1-3. Metering Data Output Each metering data output is expressed as two's complement data except for 2MFFLGO and formed to be the left justified MSB first or right justified LSB first by the OFORM pin setting. The resolution of each metering data is 16 bits and read out by 64Fs 2BCKI clock. The reference level of SACD (0dBSACD) corresponds to 3FFF (H) or C000 (H) in order to display up to +6dBSACD except for MaxPeak. 0dBSACD for MaxPeak is 3800 (H) or C800 (H), then 7000 (H) or 9000 (H) at +6dBSACD.
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CXD2755Q
Output Format OFORM = High: MSB first, left justified OFORM = Low: LSB first, right justified
FSCKI 2BCKI 2O 2MFFLGO
L15 L14 L13 L2 L1 L0 R15 R14 R13 R2 R1 R0 L15
MSB
LSB DSDI0 MF/LF status
MSB
LSB DSDI1 MF/LF status
MSB
OFORM (MSB first, left justified)
FSCKI 2BCKI 2O R15 MSB 2MFFLGO
L0 L1 L2 L13 L14 L15 R0 R1 R2 R13 R14 R15
LSB DSDI0 MF/LF status
MSB
LSB DSDI1 MF/LF status
MSB
OFORM (LSB first, right justified)
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CXD2755Q
MaxPeak (ANNEX D3) The MaxPeak filter consists of 28-tap 1st-order moving average filter for quasi-50kHz bandwidth signal level monitoring.
10
Level [dB]
-100 10 Frequency [Hz]
1411200
MaxPeak Filter Frequency Response In the SACD Format Book V1.2, up to +3.1dBSACD MaxPeak is allowed and it corresponds to 5000 (H) or B000 (H). The correspondence between the MaxPeak signal level and the output codes is as follows. MaxPeak signal level +6.02dBSACD +5.38dBSACD +4.68dBSACD +3.93dBSACD +3.10dBSACD +2.18dBSACD +1.16dBSACD 0dBSACD -1.34dBSACD -2.92dBSACD -4.86dBSACD -7.36dBSACD -10.88dBSACD -16.90dBSACD - dBSACD Output code 7000 (H) 6800 (H) 6000 (H) 5800 (H) 5000 (H) 4800 (H) 4000 (H) 3800 (H) 3000 (H) 2800 (H) 2000 (H) 1800 (H) 1000 (H) 0800 (H) 9000 (H) 9800 (H) A000 (H) A800 (H) B000 (H) B800 (H) C000 (H) C800 (H) D000 (H) D800 (H) E000 (H) E800 (H) F000 (H) F800 (H) Status Format Error Format Error Format Error Format Error OK OK OK OK OK OK OK OK OK OK OK
0000 (H)
MaxPeak Signal Level vs. Output Codes As over +3.1dBSACD MaxPeak is prohibited, SACD mastering meter should indicate "Format Error" for over +3.1dBSACD MaxPeak signals. - 17 -
CXD2755Q
HF RMS (ANNEX D4) HF filter consists of 40kHz cut-off 5th-order Butterworth high-pass filter and 100kHz cut-off 5th-order Butterworth low-pass filter for high frequency noise power monitoring. For noise power monitoring, Mean-Square and SquareRoot are calculated for RMS metering internally.
0dB
-200dB 1kHz 20kHz 100kHz
HF Filter Frequency Response In the SACD Format Book V1.2, up to -20dBSACD HF RMS is allowed. As the output code contains -3.01dB offset for the sine wave input because of RMS calculation, +3.01dB offset should be added for actual metering and -23.01dB output becomes equivalent to -20dBSACD. Therefore, the correspondence between HF RMS and output codes is as follows. HF RMS signal level : +3.01dBSACD : 0dBSACD : -19.99dBSACD -20.00dBSACD : Output readout : +0dB : -3.01dB : -23.00dB -23.01dB : : 3FFF (H) : 2D40 (H) : 0487 (H) 0486 (H) : Output code : C000 (H) : D2BF (H) : FB78 (H) FB79 (H) : Status : Format Error : Format Error : Format Error OK :
HF RMS vs. Output Codes As over -20dBSACD HF RMS is prohibited, the SACD mastering meter should indicate "Format Error" for over -20dBSACD HF RMS.
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CXD2755Q
MF (ANNEX E2) MF filter consists of 20kHz cut-off 10th-order Butterworth high-pass filter and 50kHz cut-off 5th-order Butterworth low-pass filter for high frequency signal and noise level monitoring.
0dB
-200dB 1kHz 20kHz 100kHz
MF Filter Frequency Response In the SACD Format Book V1.2, over -28dBSACD MF signal is not recommended while LF is lower than MF. However, any MF signal is allowed if MF is lower than LF. The correspondence between the MF signal level and the output codes is as follows. MF signal level : 0dBSACD : -27.98dBSACD -28.00dBSACD : : 3FFF (H) : 028D (H) 028C (H) : Output code : C000 (H) : FD72 (H) FD73 (H) : Status : See MFFLGO : See MFFLGO OK :
MF vs. Output Codes MF Status Flags (ANNEX E2) MF status flags indicate the ANNEX E2 warning condition. If the internal comparator detects over -28dBSACD MF signals while LF is lower than MF, 2MFFLGO becomes "High". If MF is lower than LF, 2MFFLGO stays "Low". Therefore, 2MFFLGO can be use for ANNEX E2 warning.
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CXD2755Q
LF LF filter consists of 20kHz cut-off 10th-order Butterworth low-pass filter for audio frequency signal level monitoring.
0dB
-200dB 1kHz 20kHz 100kHz
LF Filter Frequency Response In the SACD Format Book V1.2, LF is not specified, however, LF is used for comparison with MF for MF warning. The correspondence between the LF signal level and the output codes is as follows. LF signal level : 0dBSACD : : 3FFF (H) : LF vs. Output Codes Output code : C000 (H) :
DC (ANNEX E4) The DC filter consists of 0.1Hz cut-off 2nd-order (cascaded 1st-order) low-pass filter for DC offset monitoring. In the SACD Format Book V1.2, over -50dBSACD DC offset is not recommended. The correspondence between the DC offset and the output codes is as follows. DC signal level : 0dBSACD : -49.96dBSACD -50.13dBSACD : : 3FFF (H) : 0034 (H) 0033 (H) : Output code : C000 (H) : FFCB (H) FFCC (H) : Status : Warning : Warning OK :
DC vs. Output Codes - 20 -
CXD2755Q
2. 8-Channel Mode 2-1. Input/Output Signals DSDI0 to DSDI7: Input the 8-channel DSD data CSEL0 to CSEL2: Input the channel select signal 8MXPKO: Output the 8-channel MaxPeak (ANNEX D3) data 8HFRMSO: Output the 8-channel HF RMS (ANNEX D4) calculated data 8MFO: Output the 8-channel MF (ANNEX E2) data 8MFFLGO: Output the 8-channel status flags for MF (ANNEX E2) warning 8LFO: Output the 8-channel LF data 8DCO: Output the 8-channel DC (ANNEX E4) data 2-2. DSD Data Input See 1-2. 2-3. Metering Data Output Each metering data output is expressed as two's complement data except for 8MFFLGO and formed to be the left justified MSB first or right justified LSB first by OFORM pin setting. The resolution of each metering data is 16 bits and read out with 256Fs 8BCKI clock. The reference level of SACD (0dBSACD) corresponds to 3FFF (H) or C000 (H) in order to display up to +6dBSACD except for MaxPeak. *0dBSACD for MaxPeak is 3800 (H) or C800 (H), then 7000 (H) or 9000 (H) at +6dBSACD.
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CXD2755Q
Output Format OFORM = High: MSB first, left justified OFORM = Low: LSB first, right justified
0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1
CSEL2 CSEL1 CSEL0 8BCKI 8O 8MFFLGO
CH7 CH0 CH1 CH3 CH4 MSB LSB MSB LSB MSB LSB MSB LSB MSB MSB LSB MSB LSB CH0 status CH1 status CH2 status CH3 status CH4 status CH5 status CH6 status CH7 status
OFORM (MSB first, left justified)
CSEL2 CSEL1 CSEL0 8BCKI 8O 8MFFLGO
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
CH0 CH3 CH4 CH6 CH7 MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB CH0 status CH1 status CH2 status CH3 status CH4 status CH5 status CH6 status CH7 status
OFORM (LSB first, right justified)
MaxPeak (ANNEX D3) HF RMS (ANNEX D4) MF (ANNEX E2) MF Status Flags (ANNEX E2) LF DC (ANNEX E4) See 1-3.
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CXD2755Q
Package Outline
Unit: mm
208PIN QFP (PLASTIC)
30.6 0.2 28.0 0.1 156 157 105 104 3.70 MAX 3.37 0.08
B
A 208 1 0.5 b 52 0.08 M S 0.08 S S 53
+ 0.12 0.13 - 0.08
b = 0.22 0.05
DETAIL A
0.5 0.1
0 to 7
DETAIL B
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE QFP-208P-L281 P-QFP208-28X28-0.5 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 4.9g
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
0.145 0.055
(29.6)
(0.2)
(0.125)
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Sony Corporation

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